US6925503B2 - Method and system for performing a longest prefix match search - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 54
- 241000712062 Patricia Species 0.000 claims description 15
- 238000012360 testing method Methods 0.000 claims description 6
- 230000007246 mechanism Effects 0.000 claims description 4
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- 239000004744 fabric Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/54—Organization of routing tables
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/02—Topology update or discovery
- H04L45/04—Interdomain routing, e.g. hierarchical routing
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- the present invention relates to computer systems, and more particularly to a method and system for performing a longest prefix match that more efficiently utilizes the resource of the computer system.
- FIG. 1A depicts a computer network 1 as coupled to the Internet 30 .
- the computer network 1 includes gateways 12 and 25 as well as switches 10 and 14 .
- the switches 10 and 14 are coupled to hosts 2 , 4 and 6 and hosts 16 and 18 , respectively.
- the switches 10 and 14 are also coupled to servers 7 and 8 and server 20 , respectively.
- FIG. 1B depicts a high-level block diagram of a switch 10 which can be used in a computer network such as the network 1 .
- the switch 10 includes a switch fabric 43 coupled with blades 47 , 48 and 49 .
- Each blade 47 , 48 and 49 is generally a circuit board and includes at least a network processor 42 coupled with ports 44 .
- the ports 44 are coupled with hosts (not shown in FIG. 1 B).
- the blades 47 , 48 and 49 can provide traffic to the switch fabric 43 and accept traffic from the switch fabric 43 .
- any host connected with one of the blades 47 , 48 or 49 can communicate with another host connected to another blade 47 , 48 or 49 or connected to the same blade.
- the network processor 42 may also be used in a router or other mechanism for transmitting packets.
- the addresses of the destinations for data packets utilized.
- the data packets are IP packets (“packet”), each of which has an IP address.
- the IP address which is thirty-two bits long, is typically used for determining how to route the packet.
- the IP address hereinafter termed the key, is then compared to a set of known addresses by the network processor 42 in order to determine the destination and how to forward the packet. This comparison is made using a longest prefix match search, which finds the closest match to the key from a set of stored addresses available to the network processor 42 .
- FIG. 2 depicts a conventional method 50 for forwarding a packet using a longest prefix match.
- the method 50 is typically used by a network processor 42 that resides in a switch, router or other component that forwards packets.
- a search of a tree including stored addresses is performed in order to find the longest prefix match, via step 52 .
- the longest prefix match is a stored address which is the closest match to the key.
- the longest prefix match need not be an exact match for the key.
- the longest prefix match is typically the stored address which matches the most significant bits of the key.
- the type of tree used in step 52 is typically a Patricia tree.
- the search performed in step 52 typically searches bit by bit. For example, a first bit of the key is tested to determine its value. Based on the outcome of the test of a particular bit, if the bit is a one or a zero, another bit is tested. This process continues until the stored address that matches the most bits of the key is found.
- FIG. 3 depicts a Patricia tree 60 .
- the Patricia tree 60 is shown as testing only a relatively small number of bits.
- the Patricia tree 60 includes nodes 62 , 64 , 70 and 74 , branches 63 , 65 , 66 , 69 , 71 , 72 , 75 and 76 and leaves 67 , 68 , 73 , 77 and 78 .
- the nodes 62 , 64 , 70 and 74 are where bits of the key are tested.
- the branches 63 , 65 , 66 , 69 , 71 , 72 , 76 and 76 represent pointers to the next bit to test and the value of the bit tested.
- the leaves 67 , 68 , 73 , 77 and 78 represent stored addresses.
- the stored addresses at the leaves 67 , 68 , 73 , 77 and 78 could be a full IP address having 32 bits or could be a prefix for an IP address, such as the address for the router used to connect to certain IP addresses.
- the prefix might include only twenty-four bits.
- the stored addresses may include prefixes because a particular network processor 42 may have knowledge of only some of the components of the network 1 . Using the stored addresses known by the network processor 42 , the IP packet can be forwarded to a known point in the network that is close to the destination of the IP packet indicated by the key. Thus, a longest prefix match is used to ensure that the IP packet travels closer to the destination indicated by the key for the IP packet.
- step 52 of the method 50 would be performed.
- a first bit in the key, bit A is tested at node 62 . If bit A is a one, then branch 63 is taken to node 64 . Based on the test of bit B at the node 64 , the address A 1 or A 2 is obtained as the longest prefix match. Thus, if bit B is a one, then the address A 2 on leaf 68 is used. If bit B is a zero, then the address Al on the leaf 67 is used.
- the addresses A 1 and A 2 may be complete IP addresses, or may be prefixes.
- bit A at node 62 is a zero
- branch 69 is taken to node 70 , where bit C is tested. If bit C is a one, then address A 3 at leaf 73 is determined to be the longest prefix match for the key. If bit C is a zero, then bit D at node 74 is tested. If bit D is a zero then address A 4 of leaf 77 is the longest prefix match. However, if bit D is a one, then address A 5 of leaf 78 is determined to be the longest prefix match for the key. As discussed above, the address A 1 , A 2 , A 3 , A 4 or A 5 that is the longest prefix match may simply be a prefix for the key, rather than an exact match of the key.
- the longest prefix match is used to forward the IP packet, via step 54 .
- the longest prefix match for a particular key (IP address) of a packet is found.
- the longest prefix match could theoretically be as short as one bit or as long as the key when an exact match is found.
- the longest prefix match is then used to forward the IP packet to a point in the network that is closer to the destination of the IP packet.
- the method 50 can then be repeated by another component, such as another router or switch, to continue to move the IP packet closer to the destination.
- the method 50 can also be repeated by the network processor 42 for other IP packets traveling through the network 1 .
- the Patricia tree 60 requires a relatively large amount of memory, which is undesirable.
- the Patricia tree 60 actually includes only stored addresses, some of which are prefixes. However, space to store other complete IP addresses as well as other prefixes must also be allocated for the Patricia tree 60 . For example, suppose the address A 3 is a prefix having only twenty-four significant bits. In FIG. 3 , all nodes, such as the nodes 62 , 64 , 70 and 74 , must allow space to point to subsequent nodes and leaves.
- the nodes 62 and 70 include prefixes 79 and 80
- nodes 64 and 74 contain empty space holders for prefixes. Providing this space consumes a relatively large amount of memory (not explicitly shown).
- One way to reduce space consumption when implementing the Patricia tree 60 and the method 50 is to use different node types, one type for nodes that contain prefixes as well as next node pointers when prefixes exist and another type for nodes that contain next node pointers without prefixes when prefixes do not exist. This makes implementation of the method 50 and the Patricia tree 60 more onerous for a developer.
- the present invention provides a method and system for finding a longest prefix match for a key in a computer network.
- the method and system comprise providing a main engine and providing an auxiliary engine.
- the main engine is for storing a first plurality of addresses and for searching the first plurality of addresses for the longest prefix match for the key. None of the first plurality of addresses is a prefix for another address of the first plurality of addresses.
- the auxiliary engine is for storing and searching a second plurality of addresses.
- a first address of the second plurality of addresses is capable of including the prefix for a second address of the first plurality of addresses or for a third address for the second plurality of addresses. None of the first plurality of addresses is the prefix for any of the second plurality of addresses.
- Each of the second plurality of addresses is distinct from each of the first plurality of addresses.
- the present invention provides an efficient mechanism for finding a longest prefix match that consumes less memory and is simpler to implement.
- FIG. 1A is a block diagram of a conventional network.
- FIG. 1B depicts a high-level block diagram of a switch 10 which can be used in a computer network such as the network 1 .
- FIG. 2 depicts a conventional method for forwarding a packet using a longest prefix match.
- FIG. 3 depicts a conventional Patricia tree.
- FIG. 4 is a block diagram depicting one embodiment of a system in accordance with the present invention that determines a longest prefix match.
- FIG. 5 is a high-level flow chart depicting one embodiment of a method in accordance with the present invention for performing a longest prefix match search using the system in accordance with the present invention.
- FIGS. 6A and 6B depict a more detailed flow chart of one embodiment of a method in accordance with the present invention for adding addresses to the system in accordance with the present invention.
- FIGS. 7A and 7B a more detailed flow chart of one embodiment of a method in accordance with the present invention for removing addresses from the system in accordance with the present invention.
- the present invention relates to an improvement in computer networks.
- the following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements.
- Various modifications to the preferred embodiment will be readily apparent to those skilled in the art and the generic principles herein may be applied to other embodiments.
- the present invention is not intended to be limited to the embodiment shown, but is to be accorded the widest scope consistent with the principles and features described herein.
- the present invention provides a method and system for finding a longest prefix match for a key in a computer network.
- the method and system comprise providing a main engine and providing an auxiliary engine.
- the main engine is for storing a first plurality of addresses and for searching the first plurality of addresses for the longest prefix match for the key. None of the first plurality of addresses is a prefix for another address of the first plurality of addresses.
- the auxiliary engine is for storing and searching a second plurality of addresses.
- a first address of the second plurality of addresses is capable of including the prefix for a second address of the first plurality of addresses or for a third address for the second plurality of addresses. None of the first plurality of addresses is the prefix for any of the second plurality of addresses.
- Each of the second plurality of addresses is distinct from each of the first plurality of addresses.
- the present invention will be described in terms of a particular network, certain components, such as a switch, and a particular network processor. However, one of ordinary skill in the art will readily recognize that this method and system will operate effectively for other networks, other components, such as routers, and other network processors.
- the present invention will also be described in the context of particular methods. However, one of ordinary skill in the art will readily recognize that the present invention is consistent with other methods having different or additional steps.
- the present invention will also be described in the context of IP packets. However, one of ordinary skill in the art will readily recognize that the present invention is applicable to other situations in which a best match that need not be an identical match is to be found. For example, the present invention is described in the context of storing addresses and searching for the longest prefix match for a key (IP address) for an IP packet. However, the present invention is consistent with storing other quantities and searching the stored quantities for a closest match to another item.
- FIG. 4 depicting one embodiment of a system 100 in accordance with the present invention that determines a longest prefix match.
- the system 100 is preferably used by the network processor 42 depicted in FIG. 1 B.
- the system 100 is preferably used in a switch 10 , router or other component that is to forward IP packets through a network.
- the system 100 includes a main engine 102 and an auxiliary engine 104 .
- the main engine 102 and the auxiliary engine 104 would be used to store entries, preferably IP addresses, which are known to the system 100 .
- the main engine 102 stores some of these addresses, while the auxiliary engine 104 stores other of these addresses.
- each address stored in the system 100 is distinct.
- the main engine 102 stores addresses which are not prefixes of another address by the system 100 .
- the address is not a prefix of another address stored in the main engine 102 and is not a prefix of an address stored by the auxiliary engine 104 .
- a prefix is an address which exactly matches a portion of another address stored by the system 100 . However, a prefix of an address does not include duplicates of the address.
- the main engine 102 stores all of the addresses which are not prefixes of another entry. In a preferred embodiment, the main engine 102 stores all of the addresses that are not prefixes of another stored address and that have at least a particular minimum length, preferably sixteen bits
- the auxiliary engine 104 stores addresses which can be prefixes for other addresses stored by the system 100 . Thus, an address stored by the auxiliary engine could match some portion of an address stored by the main engine 102 and could match some portion of another address stored by the auxiliary engine 102 .
- the auxiliary engine might be a content addressable memory (“CAM”) or a direct table.
- the main engine 102 includes a direct table 106 having a plurality of table entries and trees 108 . Each of the trees 108 is preferably a Patricia tree.
- the main engine 102 preferably stores addresses having at least a certain length. In a preferred embodiment, where the longest prefix match for a thirty-two bit IP address is to be found, addresses stored in the main engine 102 must have a length of at least sixteen bits. However, another length could be used.
- the direct table is preferably indexed using the minimum length of the addresses stored in the main engine 102 .
- the direct table 106 thus has entries indexed by the first sixteen bits of the addresses that could be stored at the table entry. If more than one address having the same first sixteen bits is stored in the main engine 102 , then a tree of the trees 108 is attached to the table entry corresponding to the first sixteen bits of the address. Each of the trees 108 includes nodes, branches and leaves (not explicitly shown) that allow the addresses stored in the main engine and having the same first sixteen bits to be distinguished.
- main engine 102 and the auxiliary engine 104 store address known by the system 100 , the main engine 102 and the auxiliary engine 104 can be searched in order to find a longest prefix match for a key of a packet that is being forwarded using the system 100 .
- FIG. 5 depicts a high level flow chart of a method 200 in accordance with the present invention for performing a longest prefix match search using the system 100 in accordance with the present invention.
- the key for which the longest prefix match is searched is the IP address for a packet.
- a search of the main engine 102 for the key is performed, via step 202 .
- step 202 includes using the first sixteen bits of the key to locate a particular entry in the direct table 106 , then using the remainder of the key, if necessary, to obtain either an exact match for the key or the longest prefix match for the key.
- This step could also include utilizing one of the trees 108 , if any, attached to the particular entry.
- step 204 It is determined whether an exact match of the key or the longest prefix match for the key was found in the main engine 102 , via step 204 . If so, the method terminates in step 206 . The packet can then be forwarded using the longest prefix match. If the exact match or longest prefix match for the key was not found in the main engine 102 , then the auxiliary engine 104 is searched for the longest prefix match, via step 208 .
- the main engine 102 is searched for the longest prefix match first. Only if the longest prefix match is not found is the auxiliary engine 104 searched.
- the main engine 102 can be searched relatively quickly because the main engine 102 will not store all of the addresses stored by the system 100 . Moreover, it is generally more likely that an exact match or a closer match (sixteen bits or greater) will be found.
- the auxiliary engine therefore, is not searched as often as the main engine 102 .
- the search performed using the method 200 may be relatively fast and efficient.
- the main engine 102 needs to be able store a smaller number of addresses and prefixes (in a preferred embodiment, only those which are at least sixteen bits long and which are not prefixes of another address).
- control blocks for prefixes of other addresses can be used in the auxiliary engine 104 only, while control blocks for addresses are used only in the main engine 102 .
- FIGS. 6A and 6B depict a more detailed flow chart of one embodiment of a method 210 in accordance with the present invention for adding addresses to the system 100 in accordance with the present invention.
- the method 210 will be described in conjunction with FIG. 3 .
- the method 210 allows addresses to be added to the main engine 102 or the auxiliary engine 104 and preserve the properties of the main engine 102 and the auxiliary engine 104 . It is determined whether a new address is to be inserted into the system 100 , via step 212 . If not, step 212 is repeated. Otherwise, it is determined whether the new address is at least a particular, minimum length, via step 214 . This minimum length is also known as the direct table length (“DT length”).
- DT length direct table length
- the DT length is the minimum length of an entry in the direct table.
- the particular length is sixteen bits. If the new address is not at least the particular length, then the new address is stored in the auxiliary engine, via step 230 . If the new address is at least the particular length, new address is padded, if necessary in order to reach a particular length, via step 216 .
- the maximum length possible for IP addresses is currently thirty-two bits.
- the system 100 is preferably configured to be able to store and utilize thirty-two bit addresses. However, a particular IP address may have fewer bits. If the new address to be stored has less than thirty-two bits, for example sixteen or twenty-four bits, then the new address is padded until it reaches thirty-two bits. Generally, the new address will be padded by adding zeroes to the end of the new address.
- step 218 the addresses stored in the main engine 102 are searched to determine whether there is a longest prefix match available.
- the longest prefix match is the address in the main engine 102 that matches the most bits of the new address. If there is no longest prefix match, then the new address is stored in the main engine 102 , via step 220 . If there is a longest prefix match in the main engine, it is determined whether the longest prefix match has the same length as the new address, via step 222 . If so, then the new address is a duplicate of the longest prefix match. Thus, the leaf action is simply refreshed, via step 224 .
- the longest prefix match is not the same length, then it is determined whether the longest prefix match in the main engine 102 is shorter than the new address, via step 226 . If the longest prefix match is shorter, then the new address is stored in the main engine and the longest prefix match is moved to the auxiliary engine 104 , via step 228 . Step 228 moves the longest prefix match to the auxiliary engine 104 in order to retain the above-mentioned properties of the main engine 102 , that no address in the main engine 102 is a prefix of another address in the main engine 102 . If the longest prefix match is not shorter than the new address, the longest prefix match must be longer than the new address. Thus, the new address is stored in the auxiliary engine 104 , via step 230 .
- the method 210 allows new addresses to be stored in the system 100 , while retaining the properties of the main engine 102 and the auxiliary engine 104 .
- the main engine will continue to store only those addresses which are not prefixes of other addresses in the system 100 and, in a preferred embodiment, which have at least a minimum length.
- searching and implementation of the main engine 102 remain faster and more efficient.
- FIGS. 7A and 7B depict a more detailed flow chart of one embodiment of a method 250 in accordance with the present invention for removing items from the main engine 102 of the system 100 in accordance with the present invention. If the main engine 102 is to continue to store all addresses having at least a particular length and which are not prefixes of other addresses, then when an address is deleted from the main engine, the method 250 is used.
- step 252 It is determined whether there is an address to be deleted, via step 252 . If not, then step 252 is repeated. If so, then the main engine 102 is searched to determine whether there is an exact match for the address to be deleted in the main engine, via step 254 . If no match is found in the main engine 102 , then the deletion is complete. If a match for the address to be deleted is found in the main engine, then the auxiliary engine 104 is searched for the longest prefix match of the address to be deleted, via step 256 . It is determined whether the longest prefix match was located in the auxiliary engine, via step 258 . Note that steps 256 and 258 could be merged.
- the address is simply deleted from the main engine 102 , via step 260 .
- the method 250 then ends. If not, then the length of the longest prefix match in the auxiliary engine 104 is determined, via step 262 . It is determined whether the length of the longest prefix match was less than a particular, minimum, length, preferably sixteen bits, via step 264 . If the longest prefix match is less than the particular length, then the address is simply deleted from the main engine in step 260 . This is because the longest prefix match is too short to be moved to the main engine.
- the index of the address to be deleted from the main engine 102 is determined, via step 266 .
- the index is the most significant bit at which the pattern differs with a pattern in the tree. It is then determined whether the longest prefix match from the auxiliary engine 102 is shorter than the index, via step 268 . If so, then the address is simply deleted from the main engine 102 in step 260 . If the longest prefix match in the auxiliary engine 104 is not shorter than the index, then the address is deleted from the main engine 102 and the longest prefix match from the auxiliary engine 104 is used to replace the address being deleted, via step 270 . Preferably, replacement is accomplished by changing the pointers to point to the longest prefix match.
- the longest prefix which is not a prefix of another address stored by the system 100 is effectively put in the main engine to replace the address being deleted.
- the desired properties of the main engine 102 are retained.
- the capabilities of the system 100 to search quickly and efficiently for the longest prefix match for a key and to be efficiently implemented are retained.
- the system 100 can rapidly and efficiently perform a search of stored addresses for the longest prefix match for a key.
- the system 100 can maintain the desired properties of the main engine 102 and the auxiliary engine 104 , while inserting or deleting addresses.
- the system 100 and the methods 200 , 210 and 250 can rapidly search for the longest prefix match of a key as well as be implemented more efficiently and easily.
- a method and system has been disclosed for determining a longest prefix match for an address.
- Software written according to the present invention is to be stored in some form of computer-readable medium, such as memory, CD-ROM or transmitted over a network, and executed by a processor. Consequently, a computer-readable medium is intended to include a computer readable signal which, for example, may be transmitted over a network.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050010686A1 (en) * | 2003-05-01 | 2005-01-13 | Ntt Docomo, Inc. | Router and address indentification information management server |
US20130031077A1 (en) * | 2011-07-28 | 2013-01-31 | Brocade Communications Systems, Inc. | Longest Prefix Match Scheme |
US8880507B2 (en) | 2010-07-22 | 2014-11-04 | Brocade Communications Systems, Inc. | Longest prefix match using binary search tree |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7167471B2 (en) * | 2001-08-28 | 2007-01-23 | International Business Machines Corporation | Network processor with single interface supporting tree search engine and CAM |
US20040139274A1 (en) * | 2002-10-21 | 2004-07-15 | Hui Ronald Chi-Chun | Virtual content addressable memory with high speed key insertion and deletion and pipelined key search |
US7403526B1 (en) * | 2004-05-17 | 2008-07-22 | Cisco Technology, Inc. | Partitioning and filtering a search space of particular use for determining a longest prefix match thereon |
US8908696B2 (en) * | 2008-09-09 | 2014-12-09 | At&T Intellectual Property I, L.P. | Systems and methods for optimized route caching |
US8364684B2 (en) | 2010-10-27 | 2013-01-29 | Apple Inc. | Methods for prefix indexing |
CN105515991A (en) * | 2014-09-23 | 2016-04-20 | 中兴通讯股份有限公司 | Method for extending the routing table capacity of three-layer forwarding equipment, and forwarding equipment |
US9680749B2 (en) * | 2015-02-27 | 2017-06-13 | Arista Networks, Inc. | System and method of using an exact match table and longest prefix match table as a combined longest prefix match |
US10318587B1 (en) | 2015-09-20 | 2019-06-11 | Barefoot Networks, Inc. | Algorithmic TCAM based ternary lookup |
US10659363B2 (en) | 2017-12-01 | 2020-05-19 | Extreme Networks, Inc. | Forwarding table management |
US10778583B2 (en) | 2018-03-06 | 2020-09-15 | Barefoot Networks, Inc. | Chained longest prefix matching in programmable switch |
Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5546390A (en) | 1994-12-29 | 1996-08-13 | Storage Technology Corporation | Method and apparatus for radix decision packet processing |
US6012061A (en) | 1997-11-25 | 2000-01-04 | International Business Machines Corp. | Method and apparatus for deleting nodes in Patricia trees |
US6011795A (en) | 1997-03-20 | 2000-01-04 | Washington University | Method and apparatus for fast hierarchical address lookup using controlled expansion of prefixes |
US6014659A (en) | 1989-07-12 | 2000-01-11 | Cabletron Systems, Inc. | Compressed prefix matching database searching |
US6018524A (en) | 1997-09-09 | 2000-01-25 | Washington University | Scalable high speed IP routing lookups |
US6052683A (en) | 1998-02-24 | 2000-04-18 | Nortel Networks Corporation | Address lookup in packet data communication networks |
US6061712A (en) * | 1998-01-07 | 2000-05-09 | Lucent Technologies, Inc. | Method for IP routing table look-up |
US6061679A (en) | 1997-11-25 | 2000-05-09 | International Business Machines Corporation | Creating and searching a data structure ordered by ranges of key masks associated with the data structure |
US6067574A (en) * | 1998-05-18 | 2000-05-23 | Lucent Technologies Inc | High speed routing using compressed tree process |
JP2000332786A (en) * | 1999-05-21 | 2000-11-30 | Nippon Telegr & Teleph Corp <Ntt> | Method for retrieval from routing table |
JP2000358064A (en) * | 1999-06-17 | 2000-12-26 | Nippon Telegr & Teleph Corp <Ntt> | Device and method for routing table retrieval |
US6223172B1 (en) * | 1997-10-31 | 2001-04-24 | Nortel Networks Limited | Address routing using address-sensitive mask decimation scheme |
US6457061B1 (en) * | 1998-11-24 | 2002-09-24 | Pmc-Sierra | Method and apparatus for performing internet network address translation |
US6778532B1 (en) * | 1998-10-05 | 2004-08-17 | Hitachi, Ltd. | Packet relaying apparatus and high speed multicast system |
-
2001
- 2001-07-27 US US09/916,766 patent/US6925503B2/en not_active Expired - Fee Related
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6014659A (en) | 1989-07-12 | 2000-01-11 | Cabletron Systems, Inc. | Compressed prefix matching database searching |
US5546390A (en) | 1994-12-29 | 1996-08-13 | Storage Technology Corporation | Method and apparatus for radix decision packet processing |
US6011795A (en) | 1997-03-20 | 2000-01-04 | Washington University | Method and apparatus for fast hierarchical address lookup using controlled expansion of prefixes |
US6018524A (en) | 1997-09-09 | 2000-01-25 | Washington University | Scalable high speed IP routing lookups |
US6223172B1 (en) * | 1997-10-31 | 2001-04-24 | Nortel Networks Limited | Address routing using address-sensitive mask decimation scheme |
US6061679A (en) | 1997-11-25 | 2000-05-09 | International Business Machines Corporation | Creating and searching a data structure ordered by ranges of key masks associated with the data structure |
US6012061A (en) | 1997-11-25 | 2000-01-04 | International Business Machines Corp. | Method and apparatus for deleting nodes in Patricia trees |
US6061712A (en) * | 1998-01-07 | 2000-05-09 | Lucent Technologies, Inc. | Method for IP routing table look-up |
US6052683A (en) | 1998-02-24 | 2000-04-18 | Nortel Networks Corporation | Address lookup in packet data communication networks |
US6067574A (en) * | 1998-05-18 | 2000-05-23 | Lucent Technologies Inc | High speed routing using compressed tree process |
US6778532B1 (en) * | 1998-10-05 | 2004-08-17 | Hitachi, Ltd. | Packet relaying apparatus and high speed multicast system |
US6457061B1 (en) * | 1998-11-24 | 2002-09-24 | Pmc-Sierra | Method and apparatus for performing internet network address translation |
JP2000332786A (en) * | 1999-05-21 | 2000-11-30 | Nippon Telegr & Teleph Corp <Ntt> | Method for retrieval from routing table |
JP2000358064A (en) * | 1999-06-17 | 2000-12-26 | Nippon Telegr & Teleph Corp <Ntt> | Device and method for routing table retrieval |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050010686A1 (en) * | 2003-05-01 | 2005-01-13 | Ntt Docomo, Inc. | Router and address indentification information management server |
US7526569B2 (en) * | 2003-05-01 | 2009-04-28 | Ntt Docomo, Inc. | Router and address identification information management server |
US8880507B2 (en) | 2010-07-22 | 2014-11-04 | Brocade Communications Systems, Inc. | Longest prefix match using binary search tree |
US20130031077A1 (en) * | 2011-07-28 | 2013-01-31 | Brocade Communications Systems, Inc. | Longest Prefix Match Scheme |
US8880494B2 (en) * | 2011-07-28 | 2014-11-04 | Brocade Communications Systems, Inc. | Longest prefix match scheme |
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